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https://doi.org/10.1109/TED.2010.2088125
Title: | Germanium nanowire metal-oxide-semiconductor field-effect transistor fabricated by complementary-metal-oxide-semiconductor-compatible process | Authors: | Peng, J.W. Singh, N. Lo, G.Q. Bosman, M. Ng, C.M. Lee, S.J. |
Keywords: | Core/shell (C/S) germanium (Ge) metaloxidesemiconductor field-effect transistor (MOSFET) nanowire (NW) topdown |
Issue Date: | Jan-2011 | Citation: | Peng, J.W., Singh, N., Lo, G.Q., Bosman, M., Ng, C.M., Lee, S.J. (2011-01). Germanium nanowire metal-oxide-semiconductor field-effect transistor fabricated by complementary-metal-oxide-semiconductor-compatible process. IEEE Transactions on Electron Devices 58 (1) : 74-79. ScholarBank@NUS Repository. https://doi.org/10.1109/TED.2010.2088125 | Abstract: | This work presents a complementary metaloxidesemiconductor-compatible topdown fabrication of Ge nanowires along with their integration into pMOSFETs with "HfO2/TaN" high-k/metal gate stacks. Lateral Ge wires down to 14 nm in diameter are achieved using a two-step dry etch process on a high-quality epitaxial Ge layer. To improve the interface quality between the Ge nanowire and the HfO2, thermally grown GeO2 and epitaxial-Si shells are used as interlayers. Devices with a GeO2 shell demonstrated excellent ION/I OFF} ratios (>106), whereas the epitaxial-Si shell was found to improve the field-effect mobility of the holes in Ge nanowires to 254 cm2V -1.s-1. © 2010 IEEE. | Source Title: | IEEE Transactions on Electron Devices | URI: | http://scholarbank.nus.edu.sg/handle/10635/82412 | ISSN: | 00189383 | DOI: | 10.1109/TED.2010.2088125 |
Appears in Collections: | Staff Publications |
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