Please use this identifier to cite or link to this item: https://doi.org/10.1109/LED.2014.2310851
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dc.titleAu-free normally-off AlGaN/GaN-on-Si MIS-HEMTs using combined partially recessed and fluorinated trap-charge gate structures
dc.contributor.authorHuang, H.
dc.contributor.authorLiang, Y.C.
dc.contributor.authorSamudra, G.S.
dc.contributor.authorNgo, C.L.L.
dc.date.accessioned2014-10-07T04:24:07Z
dc.date.available2014-10-07T04:24:07Z
dc.date.issued2014
dc.identifier.citationHuang, H., Liang, Y.C., Samudra, G.S., Ngo, C.L.L. (2014). Au-free normally-off AlGaN/GaN-on-Si MIS-HEMTs using combined partially recessed and fluorinated trap-charge gate structures. IEEE Electron Device Letters 35 (5) : 569-571. ScholarBank@NUS Repository. https://doi.org/10.1109/LED.2014.2310851
dc.identifier.issn07413106
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/81993
dc.description.abstractIn this letter, partially recessed gate structures in conjunction with negative trap charges by F- plasma treatments both at AlGaN barrier and on gate dielectric surface are employed to realize the normally-OFF operation for AlGaN/GaN Metal-Insulator-Semiconductor High Electron Mobility Transistors in Au-free scheme. A partial gate recessed trench is designed to effectively reduce the 2-D electron gas (2DEG) density and achieve positive threshold voltage Vth without severe degradation in 2-DEG channel mobility. Furthermore, the fixed trap charges are innovatively placed at the gate AlGaN and Si3N4 layers by a two-stage F- plasma treatment to further increase the Vth , without mobility degradation. A high Vth of 1.9 V and a drain current ∼200~mA/mm are achieved in the fabricated device, which also has a lower leakage current and the higher breakdown voltage of 580 V. © 2014 IEEE.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/LED.2014.2310851
dc.sourceScopus
dc.subjectAlGaN/GaN HEMTs
dc.subjectAu-free
dc.subjectgate trench
dc.subjectnormally-off
dc.subjectplasma treatment.
dc.typeArticle
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/LED.2014.2310851
dc.description.sourcetitleIEEE Electron Device Letters
dc.description.volume35
dc.description.issue5
dc.description.page569-571
dc.description.codenEDLED
dc.identifier.isiut000335147600023
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