Please use this identifier to cite or link to this item: https://doi.org/10.1109/LED.2003.812548
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dc.titleAn integratable dual metal gate CMOS process using an ultrathin aluminum nitride buffer layer
dc.contributor.authorPark, C.S.
dc.contributor.authorCho, B.J.
dc.contributor.authorKwong, D.-L.
dc.date.accessioned2014-10-07T04:23:38Z
dc.date.available2014-10-07T04:23:38Z
dc.date.issued2003-05
dc.identifier.citationPark, C.S., Cho, B.J., Kwong, D.-L. (2003-05). An integratable dual metal gate CMOS process using an ultrathin aluminum nitride buffer layer. IEEE Electron Device Letters 24 (5) : 298-300. ScholarBank@NUS Repository. https://doi.org/10.1109/LED.2003.812548
dc.identifier.issn07413106
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/81953
dc.description.abstractWe propose and demonstrate a novel approach for dual metal gate CMOS process integration through the use of a very thin aluminum nitride (AINx) buffer layer between metal and gate oxide. This buffer layer prevents the gate oxide from being exposed to a metal etching process which potentially causes oxide thinning and damage. Subsequent annealing consumes the very thin AlNx layer and converts it into a new metal alloy film by reacting with gate metals, resulting in no increase in EOT due to this buffer layer. The work function of the original gate metal is also modified as a result of its reaction with AlNx, making this approach extremely attractive for engineering the work function for dual metal gate CMOS applications.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/LED.2003.812548
dc.sourceScopus
dc.subjectAluminum nitride
dc.subjectCMOS
dc.subjectDual metal gates
dc.subjectWorkfunction
dc.typeArticle
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/LED.2003.812548
dc.description.sourcetitleIEEE Electron Device Letters
dc.description.volume24
dc.description.issue5
dc.description.page298-300
dc.description.codenEDLED
dc.identifier.isiut000184064600004
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