Simple modelling of device speed in double-gate SOI MOSFETs

Abstract

A new simple and accurate model for device speed is proposed for the first time in double-gate SOI MOSFETs. Simulation studies are done with physical and electrical parameters. Experimental results are compared with the results predicted by the analytical model and good agreement is seen. A record maximum value of transconductance in DG-SOI MOSFETs is achieved (1350 ms/mm at Lg = 0.05 μm and Tsi = 50 nm). It has been observed analytically that device speed higher than 1×107 cm/s is possible in DG-SOI MOSFETs at a lower silicon thickness and substrate concentration at Lg≤0.35 μm by appropriate modelling of parameters.