Please use this identifier to cite or link to this item:
https://doi.org/10.1109/55.887467
DC Field | Value | |
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dc.title | Improved NiSi salicide process using presilicide N2 + implant for MOSFETs | |
dc.contributor.author | Lee, P.S. | |
dc.contributor.author | Pey, K.L. | |
dc.contributor.author | Mangelinck, D. | |
dc.contributor.author | Ding, J. | |
dc.contributor.author | Wee, A.T.S. | |
dc.contributor.author | Chan, L. | |
dc.date.accessioned | 2014-10-07T02:59:02Z | |
dc.date.available | 2014-10-07T02:59:02Z | |
dc.date.issued | 2000-12 | |
dc.identifier.citation | Lee, P.S., Pey, K.L., Mangelinck, D., Ding, J., Wee, A.T.S., Chan, L. (2000-12). Improved NiSi salicide process using presilicide N2 + implant for MOSFETs. IEEE Electron Device Letters 21 (12) : 566-568. ScholarBank@NUS Repository. https://doi.org/10.1109/55.887467 | |
dc.identifier.issn | 07413106 | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/80577 | |
dc.description.abstract | An improved Ni salicide process has been developed by incorporating nitrogen (N2 +) implant prior to Ni deposition to widen the salicide processing temperature window. Salicided poly-Si gate and active regions of different linewidths show improved thermal stability with low sheet resistance up to a salicidation temperature of 700 and 750 °C, respectively. Nitrogen was found to be confined within the NiSi layer and reduced agglomeration of the silicide. Phase transformation to the undesirable high resistivity NiSi2 phase was delayed, likely due to a change in the interfacial energy. The electrical results of N2 + implanted Ni-salicided PMOSFETs show higher drive current and lower junction leakage as compared to devices with no N2 + implant. | |
dc.description.uri | http://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/55.887467 | |
dc.source | Scopus | |
dc.type | Article | |
dc.contributor.department | ELECTRICAL ENGINEERING | |
dc.contributor.department | MATERIALS SCIENCE | |
dc.contributor.department | PHYSICS | |
dc.description.doi | 10.1109/55.887467 | |
dc.description.sourcetitle | IEEE Electron Device Letters | |
dc.description.volume | 21 | |
dc.description.issue | 12 | |
dc.description.page | 566-568 | |
dc.description.coden | EDLED | |
dc.identifier.isiut | 000165684000007 | |
Appears in Collections: | Staff Publications |
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