Effects of measurement frequency and temperature anneal on differential gate capacitance spectra observed in hot carrier stressed MOSFET's

Abstract

Hot carrier generated fixed and interface traps, located at the Si-SiO2 interface near the drain junction are observed from the gate to - drain capacitance of the MOS transistor using an ac measurements signal applied to the drain. Observations show that when the channel is biased in inversion, the drain junction is forward biased and in channel depletion, the drain junction is reverse biased. Distinct peaks appeared on the differential capacitance spectrum which are attributed to the response of donor and acceptor interface traps located on either half of the band gap. The differential gate-to-drain capacitance allows the electrical identification of both donor and acceptor interface traps in the same device.