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|Title:||Analytical approximations for diffused junctions under high-level conditions||Authors:||Choo, S.C.
|Issue Date:||Sep-1976||Citation:||Choo, S.C.,Yamasaki, H. (1976-09). Analytical approximations for diffused junctions under high-level conditions. Solid State Electronics 19 (9) : 769-776. ScholarBank@NUS Repository.||Abstract:||A theoretical sutdy is made of the applicability of a previously-proposed diffused-junction model to diffused junctions with varying degrees of steepness in the impurity profile. This is done by comparing the predictions of the model with the exact numerical solutions obtained for a series of silicon p+n diffused junctions, ranging from very gradual junctions to the infinitely steep or ideal step junctions, and with the lightly-doped side of the junction in each case under high-level injection conditions. The results indicate that the range of validity of the model extends from those gradual junctions which are typically found in high-power thyristor structures to relatively steep diffused junctions similar to those that can occur in the emitter regions of UHF transistors. © 1976.||Source Title:||Solid State Electronics||URI:||http://scholarbank.nus.edu.sg/handle/10635/80297||ISSN:||00381101|
|Appears in Collections:||Staff Publications|
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