Please use this identifier to cite or link to this item: https://doi.org/10.1109/81.817382
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dc.titleA low-voltage CMOS OTA with rail-to-rail differential input range
dc.contributor.authorLi, M.F.
dc.contributor.authorDasgupta, U.
dc.contributor.authorZhang, X.W.
dc.contributor.authorLim, Y.C.
dc.date.accessioned2014-10-07T02:55:43Z
dc.date.available2014-10-07T02:55:43Z
dc.date.issued2000-01
dc.identifier.citationLi, M.F., Dasgupta, U., Zhang, X.W., Lim, Y.C. (2000-01). A low-voltage CMOS OTA with rail-to-rail differential input range. IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications 47 (1) : 1-8. ScholarBank@NUS Repository. https://doi.org/10.1109/81.817382
dc.identifier.issn10577122
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/80274
dc.description.abstractThis paper describes a novel circuit design technique for a low-voltage CMOS operational transconductance amplifier (OTA) where the output current versus the input voltage relationship is linear for differential input voltage range extended from rail to rail. The input transconducting CMOS transistors operate in the nonsaturation region. A pair of complementary n-type input OTAN and p-type OTAP circuits in conjunction with n-MOS and p-MOS output current mirrors are connected in parallel to implement the rail-to-rail voltage input and push-pull current output. The transconductances gmn and gmp of the OTAN and the OTAP are tuned by biasing voltages VDSN and VDSP, respectively. A masterbias generator (with VDSP as input) is used to generate VDSN as output so as to satisfy gmn = gmp. The circuit is capable of operating at supply voltage larger than two times the MOS transistor threshold voltage VT. When the supply voltage is 2 V and the MOS transistor threshold voltage is 0.7 V, using SPICE level 3-2 μm CMOS technology device parameters, the simulation result of the output current deviation from perfect linearity is less than 0.3% for rail-to-rail differential input voltage range. © 2000 IEEE.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/81.817382
dc.sourceScopus
dc.typeArticle
dc.contributor.departmentELECTRICAL ENGINEERING
dc.description.doi10.1109/81.817382
dc.description.sourcetitleIEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications
dc.description.volume47
dc.description.issue1
dc.description.page1-8
dc.description.codenITCAE
dc.identifier.isiut000084926900001
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