DESIGN METHODOLOGIES FOR RELIABLE AND ENERGY-EFFICIENT MULTIPROCESSOR SYSTEM

Abstract

AN EMERGING CONCERN FOR SYSTEM DESIGNS AT DEEP-SUBMICRON TECHNOLOGY NODES IS THE LIFETIME RELIABILITY, AS ESCALATING POWER DENSITY AND HENCE TEMPERATURE VARIATION CONTINUES TO ACCELERATE WEAR-OUT LEADING TO A GROWING PROMINENCE OF DEVICE DEFECTS. IN THIS THESIS, A PLATFORM-BASED DESIGN METHODOLOGY IS PRESENTED TO IMPROVE THE LIFETIME RELIABILITY OF MULTIPROCESSOR SYSTEMS THROUGH ENERGY- AND PERFORMANCE-AWARE INTELLIGENT TASK MAPPING. THIS METHODOLOGY INCORPORATES A TEMPERATURE MODEL THAT PREDICTS THE TEMPERATURE OF A CORE INCORPORATING NOT ONLY ITS DEPENDENCY ON THE VOLTAGE AND FREQUENCY OF OPERATION (TEMPORAL EFFECT), BUT ALSO ITS DEPENDENCY ON THE TEMPERATURE OF THE SURROUNDING CORES (SPATIAL EFFECT). THIS MODEL IS ALSO INTEGRATED IN THE RELIABILITY-AWARE HARDWARE-SOFTWARE CO-DESIGN OF RECONFIGURABLE MULTIPROCESSOR SYSTEMS. TO PROVIDE GRACEFUL DEGRADATION, ENERGY OPTIMUM TASK MAPPINGS ARE ALSO DETERMINED FOR DIFFERENT FAULT-SCENARIOS. FINALLY, AN ADAPTIVE RUN-TIME MANAGER IS DESIGNED