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|Title:||Using formal techniques to debug the AMBA system-on-chip bus protocol||Authors:||Roychoudhury, A.
|Issue Date:||2003||Citation:||Roychoudhury, A.,Mitra, T.,Karri, S.R. (2003). Using formal techniques to debug the AMBA system-on-chip bus protocol. Proceedings -Design, Automation and Test in Europe, DATE : 828-833. ScholarBank@NUS Repository. https://doi.org/10.1109/DATE.2003.1253709||Abstract:||System-on-chip (SoC) designs use bus protocols for high performance data transfer among the intellectual property (IP) cores. These protocols incorporate advanced features such as pipelining, burst and split transfers. In this paper, we describe a case study in formally verifying a widely used SoC bus protocol: the advanced micro-controller bus architecture (AMBA) protocol from ARM. In particular, we develop a formal specification of the AMBA protocol. We then employ model checking, a state space exploration based formal verification technique, to verify crucial design invariants. The presence of pipelining and split transfer in the AMBA protocol gives rise to interesting corner cases, which are hard to detect via informal reasoning. Using the SMV model checker, we have detected a potential bus starvation scenario in the AMBA protocol. Such scenarios demonstrate the inherent intricacies in designing pipelined bus protocols. © 2003 IEEE.||Source Title:||Proceedings -Design, Automation and Test in Europe, DATE||URI:||http://scholarbank.nus.edu.sg/handle/10635/78417||ISSN:||15301591||DOI:||10.1109/DATE.2003.1253709|
|Appears in Collections:||Staff Publications|
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