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|Title:||Program performance spectrum||Authors:||Chattopadhyay, S.
|Issue Date:||2013||Citation:||Chattopadhyay, S., Chong, L.K., Roychoudhury, A. (2013). Program performance spectrum. ACM SIGPLAN Notices 48 (5) : 65-75. ScholarBank@NUS Repository. https://doi.org/10.1145/2499369.2465566||Abstract:||Real-time and embedded applications often need to satisfy several non-functional properties such as timing. Consequently, performance validation is a crucial stage before the deployment of real-time and embedded software. Cache memories are often used to bridge the performance gap between a processor and memory subsystems. As a result, the analysis of caches plays a key role in the performance validation of real-time, embedded software. In this paper, we propose a novel approach to compute the cache performance signature of an entire program. Our technique is based on exploring the input domain through different path programs. Two paths belong to the same path program if they follow the same set of control flow edges but may vary in the iterations of loops encountered. Our experiments with several subject programs show that the different paths grouped into a path program have very similar and often exactly same cache performance. Our path program exploration can be viewed as partitioning the input domain of the program. Each partition is associated with its cache performance and a symbolic formula capturing the set of program inputs which constitutes the partition. We show that such a partitioning technique has wide spread usages in performance prediction, testing, debugging and design space exploration. Copyright © 2013 ACM.||Source Title:||ACM SIGPLAN Notices||URI:||http://scholarbank.nus.edu.sg/handle/10635/78301||ISSN:||15232867||DOI:||10.1145/2499369.2465566|
|Appears in Collections:||Staff Publications|
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