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|Title:||A practical low-power memristor-based analog neural branch predictor||Authors:||Wang, J.
Neural Branch Predictor
|Issue Date:||2013||Citation:||Wang, J.,Tim, Y.,Wong, W.-F.,Li, H.H. (2013). A practical low-power memristor-based analog neural branch predictor. Proceedings of the International Symposium on Low Power Electronics and Design : 175-180. ScholarBank@NUS Repository. https://doi.org/10.1109/ISLPED.2013.6629290||Abstract:||Recently, the discovery of memristor brought the promise of high density, low energy, and combined memory/arithmetic capability into computing. This paper demonstrates a practical neural branch predictor based on memristor. By using analog computation techniques, as well as exploiting the accuracy tolerance of branch prediction, our design is able to efficiently realize a neural prediction algorithm. Compared to the digital counterpart, our method achieves significant energy reduction while maintaining a better prediction accuracy and a higher IPC. Our approach also reduces the resource and energy required by an alternative design. © 2013 IEEE.||Source Title:||Proceedings of the International Symposium on Low Power Electronics and Design||URI:||http://scholarbank.nus.edu.sg/handle/10635/77974||ISBN:||9781479912353||ISSN:||15334678||DOI:||10.1109/ISLPED.2013.6629290|
|Appears in Collections:||Staff Publications|
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