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Title: A just-in-time customizable processor
Authors: Chen, L.
Tarango, J.
Mitra, T. 
Brisk, P.
Issue Date: 2013
Citation: Chen, L.,Tarango, J.,Mitra, T.,Brisk, P. (2013). A just-in-time customizable processor. IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD : 524-531. ScholarBank@NUS Repository.
Abstract: A traditional extensible processor with customized circuits achieves high performance at the cost of flexibility, while a dynamically extensible processor with reconfigurable fabric offers flexibility for instruction-set extensions (ISEs) but suffers from computational inefficiency. We introduce a novel architecture called Just-in-Time Customizable (JiTC) processor that reconciles the conflicting demands of performance and flexibility in extensible processors. Our key innovation is a multi-stage accelerator, called Specialized Functional Unit (SFU), that is tightly integrated in the processor pipeline. The SFU design is derived through a systematic study of a large range of representative embedded applications. The SFU can be reconfigured on per-cycle basis to support different application-specific instructions at near-ideal performance of an extensible processor. We also provide an automated compilation tool chain for JiTC processor. The experimental results confirm the efficiency and applicability of our approach. © 2013 IEEE.
Source Title: IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
ISBN: 9781479910717
ISSN: 10923152
DOI: 10.1109/ICCAD.2013.6691166
Appears in Collections:Staff Publications

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