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|Title:||Thermal-aware electrical analysis of high-speed interconnect||Authors:||Liu, E.-X.
|Issue Date:||2008||Citation:||Liu, E.-X., Li, E.-P., Wei, X. (2008). Thermal-aware electrical analysis of high-speed interconnect. 2008 Electrical Design of Advanced Packaging and Systems Symposium, IEEE EDAPS 2008 - Proceedings : 171-174. ScholarBank@NUS Repository. https://doi.org/10.1109/EDAPS.2008.4736027||Abstract:||This paper studied the problem of coupled electrical and thermal modeling, specifically for the signal integrity analysis of on-chip interconnect due to the influence of substrate and interconnect temperature. The approach presented in this paper is using finite-difference method (FDM) to solve for the temperature profile of the substrate. The information of the substrate temperature is used for subsequent thermal modeling of the interconnect. The ID thermal modeling of the interconnect is done by using an equivalent thermal circuit model, which is compatible with the SPICE simulator and can fast produce the temperature profile of the interconnect. Numerical examples are presented, which show that the temperature of the interconnect affects the electrical performance of the interconnect. © 2008 IEEE.||Source Title:||2008 Electrical Design of Advanced Packaging and Systems Symposium, IEEE EDAPS 2008 - Proceedings||URI:||http://scholarbank.nus.edu.sg/handle/10635/72015||ISBN:||9781424426331||DOI:||10.1109/EDAPS.2008.4736027|
|Appears in Collections:||Staff Publications|
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