Please use this identifier to cite or link to this item:
https://scholarbank.nus.edu.sg/handle/10635/71981
DC Field | Value | |
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dc.title | The implementation of a high-speed 645-tap equivalent half-band FIR filter using the frequency response masking technique | |
dc.contributor.author | Thia, C.T. | |
dc.contributor.author | Lian, Y. | |
dc.date.accessioned | 2014-06-19T03:30:04Z | |
dc.date.available | 2014-06-19T03:30:04Z | |
dc.date.issued | 2004 | |
dc.identifier.citation | Thia, C.T.,Lian, Y. (2004). The implementation of a high-speed 645-tap equivalent half-band FIR filter using the frequency response masking technique. IEEE Region 10 Annual International Conference, Proceedings/TENCON A : A13-A16. ScholarBank@NUS Repository. | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/71981 | |
dc.description.abstract | This paper presents the implementation of a high speed, narrow transition band half-band FIR filter using Application Specific Integrated Circuits (ASIC) design methodology. The 645-tap equivalent FIR filter is able to operate at 400MHz with the help of modified Frequency Response Masking (FRM) technique [1-2] which greatly reduces the hardware cost of the long filter. The half-band filter is successfully designed using Austria Micro Systems (AMS) 0.35μm 4-metal CMOS technology. The ASIC occupies an area of 5.27mm by 5.27mm. © 2004 IEEE. | |
dc.source | Scopus | |
dc.subject | ASIC | |
dc.subject | FIR filters | |
dc.subject | Half-band | |
dc.subject | High-speed | |
dc.type | Conference Paper | |
dc.contributor.department | ELECTRICAL & COMPUTER ENGINEERING | |
dc.description.sourcetitle | IEEE Region 10 Annual International Conference, Proceedings/TENCON | |
dc.description.volume | A | |
dc.description.page | A13-A16 | |
dc.description.coden | 85QXA | |
dc.identifier.isiut | NOT_IN_WOS | |
Appears in Collections: | Staff Publications |
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