Please use this identifier to cite or link to this item: https://doi.org/10.1109/SIPS.2007.4387613
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dc.titleStable noise subspace estimation algorithm suitable for VLSI implementation
dc.contributor.authorYang, L.
dc.contributor.authorAttallah, S.
dc.contributor.authorMathew, G.
dc.date.accessioned2014-06-19T03:28:36Z
dc.date.available2014-06-19T03:28:36Z
dc.date.issued2007
dc.identifier.citationYang, L., Attallah, S., Mathew, G. (2007). Stable noise subspace estimation algorithm suitable for VLSI implementation. IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation : 579-583. ScholarBank@NUS Repository. https://doi.org/10.1109/SIPS.2007.4387613
dc.identifier.isbn1424412226
dc.identifier.issn15206130
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/71857
dc.description.abstractThe aim of this paper is twofold: 1) to stabilize a fast adaptive noise subspace algorithm, which was proposed earlier in the literature under the name of FRANS algorithm; and 2) to present a low computational cost version that is free from any square root and division operations, which is very suitable for VLSI implementation. A theoretical mean-square analysis and simulation results are also given in order to assess the performance of this algorithm. © 2007 IEEE.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/SIPS.2007.4387613
dc.sourceScopus
dc.subjectAdaptive signal processing
dc.subjectNoise subspace estimation
dc.subjectVLSI implementation
dc.typeConference Paper
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/SIPS.2007.4387613
dc.description.sourcetitleIEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
dc.description.page579-583
dc.identifier.isiut000255189800107
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