Please use this identifier to cite or link to this item: https://doi.org/10.1109/FPT.2012.6412111
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dc.titleParallel dataflow execution for sequential programs on reconfigurable hybrid MPSoCs
dc.contributor.authorWang, C.
dc.contributor.authorLi, X.
dc.contributor.authorZhou, X.
dc.contributor.authorHa, Y.
dc.date.accessioned2014-06-19T03:22:48Z
dc.date.available2014-06-19T03:22:48Z
dc.date.issued2012
dc.identifier.citationWang, C.,Li, X.,Zhou, X.,Ha, Y. (2012). Parallel dataflow execution for sequential programs on reconfigurable hybrid MPSoCs. FPT 2012 - 2012 International Conference on Field-Programmable Technology : 53-56. ScholarBank@NUS Repository. <a href="https://doi.org/10.1109/FPT.2012.6412111" target="_blank">https://doi.org/10.1109/FPT.2012.6412111</a>
dc.identifier.isbn9781467328449
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/71356
dc.description.abstractReconfigurable hybrid multi-processor systems-on-chips (MPSoCs) are very powerful computing platforms. However, it has been quite challenging to schedule and map tasks to different function units of the MPSoCs, especially for tasks with inter-task dependencies. This paper introduces a parallel dataflow execution support, called ReArc, for the FPGA based reconfigurable hybrid MPSoCs. It constructs a hierarchical model for the high level programming with a parallel execution flow and dynamic reconfigurations. A prototype has been built on a Xilinx FPGA with a state-of-the-art software-hardware co-design paradigm. Experimental results demonstrate that ReArc could significantly facilitate researchers to construct a high-level, application oriented FPGA implementation with acceptable hardware utilizations and reconfiguration overheads. © 2012 IEEE.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/FPT.2012.6412111
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/FPT.2012.6412111
dc.description.sourcetitleFPT 2012 - 2012 International Conference on Field-Programmable Technology
dc.description.page53-56
dc.identifier.isiutNOT_IN_WOS
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