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Please use this identifier to cite or link to this item: https://doi.org/10.1109/EDSSC.2005.1635217
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dc.titleMetal gate/High-K dielectric stack on Si cap/ultra-thin pure Ge epi/Si substrate
dc.contributor.authorYeo, C.C.
dc.contributor.authorLee, M.H.
dc.contributor.authorLiu, C.W.
dc.contributor.authorChoi, K.J.
dc.contributor.authorLee, T.W.
dc.contributor.authorCho, B.J.
dc.date.accessioned2014-06-19T03:17:45Z
dc.date.available2014-06-19T03:17:45Z
dc.date.issued2006
dc.identifier.citationYeo, C.C.,Lee, M.H.,Liu, C.W.,Choi, K.J.,Lee, T.W.,Cho, B.J. (2006). Metal gate/High-K dielectric stack on Si cap/ultra-thin pure Ge epi/Si substrate. 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC : 107-110. ScholarBank@NUS Repository. <a href="https://doi.org/10.1109/EDSSC.2005.1635217" target="_blank">https://doi.org/10.1109/EDSSC.2005.1635217</a>
dc.identifier.isbn0780393392
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/70917
dc.description.abstractMetal gate/High-K slack CMOSFETs on ultra thin Ge epi channel on relaxed Si, capped with ultra thin Si (Si/Ge/Si substrate) were evaluated. NMOSFET shows enhanced mobility at low field while pMOSFET shows degraded peak mobility, with enhancement observed only at high field. © 2005 IEEE.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/EDSSC.2005.1635217
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/EDSSC.2005.1635217
dc.description.sourcetitle2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC
dc.description.page107-110
dc.identifier.isiutNOT_IN_WOS
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