Please use this identifier to cite or link to this item:
Title: Fault detection and estimation of wafer warpage profile during thermal processing in microlithography
Authors: Tay, A. 
Ho, W.K. 
Hu, N.
Zhou, Y.
Keywords: Fault Detection
Photoresist Processing
Semiconductor Manufacturing
Issue Date: 2004
Citation: Tay, A.,Ho, W.K.,Hu, N.,Zhou, Y. (2004). Fault detection and estimation of wafer warpage profile during thermal processing in microlithography. AIChE Annual Meeting, Conference Proceedings : 7493-7508. ScholarBank@NUS Repository.
Abstract: Wafer warpage is common in microelectronics processing. Warped wafers can affect device performance, reliability and linewidth control in various processing steps. We proposed in this paper an in-situ approach for estimating wafer warpage profile during the thermal processing steps in microlithography process. A programmable multizone thermal processing system is developed to demonstrate the approach. Early detection will minimize cost and processing time. Based on first principle thermal modeling and system identification techniques, we are able to estimate the profile of a warped wafer from available temperature measurements. Experimental results demonstrate the feasibility and repeatability of the approach. The proposed approach is applicable to other semiconductor substrates.
Source Title: AIChE Annual Meeting, Conference Proceedings
Appears in Collections:Staff Publications

Show full item record
Files in This Item:
There are no files associated with this item.

Page view(s)

checked on May 18, 2019

Google ScholarTM


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.