Please use this identifier to cite or link to this item: https://doi.org/10.1093/ietele/e90-c.1.179
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dc.titleCapacitance extraction of three-dimensional interconnects using element-by-element finite element method (EBE-FEM) and preconditioned conjugate gradient (PCG) technique
dc.contributor.authorXu, J.
dc.contributor.authorLi, H.
dc.contributor.authorYin, W.-Y.
dc.contributor.authorMao, J.
dc.contributor.authorLi, L.-W.
dc.date.accessioned2014-06-19T03:01:56Z
dc.date.available2014-06-19T03:01:56Z
dc.date.issued2007-01
dc.identifier.citationXu, J., Li, H., Yin, W.-Y., Mao, J., Li, L.-W. (2007-01). Capacitance extraction of three-dimensional interconnects using element-by-element finite element method (EBE-FEM) and preconditioned conjugate gradient (PCG) technique. IEICE Transactions on Electronics E90-C (1) : 179-187. ScholarBank@NUS Repository. https://doi.org/10.1093/ietele/e90-c.1.179
dc.identifier.issn09168524
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/69548
dc.description.abstractThe element-by-element finite element method (EBE-FEM) combined with the preconditioned conjugate gradient (PCG) technique is employed in this paper to calculate the coupling capacitances of multi-level high-density three-dimensional interconnects (3DIs). All capacitive coupling 3DIs can be captured, with the effects of all geometric and physical parameters taken into account. It is numerically demonstrated that with this hybrid method in the extraction of capacitances, an effective and accurate convergent solution to the Laplace equation can be obtained, with less memory and CPU time required, as compared to the results obtained by using the commercial FEM software of either MAXWELL 3D or ANSYS. Copyright © 2007 The Institute of Electronics, Information and Communication Engineers.
dc.sourceScopus
dc.subjectCapacitance extraction
dc.subjectElement-by-element finite element method (FEM)
dc.subjectPre-conditioned conjugated gradient technique
dc.subjectThree-dimensional interconnects (3DIs)
dc.typeConference Paper
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1093/ietele/e90-c.1.179
dc.description.sourcetitleIEICE Transactions on Electronics
dc.description.volumeE90-C
dc.description.issue1
dc.description.page179-187
dc.description.codenIELEE
dc.identifier.isiut000243703900030
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