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Title: B*-tree based variability-aware floorplanning
Authors: Zhang, W.
Srivastava, S.
Ha, Y. 
Keywords: Affine Arithmetic
Issue Date: 2010
Citation: Zhang, W.,Srivastava, S.,Ha, Y. (2010). B*-tree based variability-aware floorplanning. IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS : 1191-1194. ScholarBank@NUS Repository.
Abstract: The scaling of technologies toward the nanometer regime brings with a challenging increase in the amount of variability across all phases of design. With the rising impact of process variations on block characteristics such as width, length and aspect ratio, a traditional deterministic floorplanner is unable to take block variations into account and a variability-aware floorplanner is needed. In this paper, we use an affine arithmetic (AA) model to develop a fast and optimized variability-aware floorplanner. The AA model enables a fast and accurate estimation of the variable range of floorplan metrics such as area and wirelength in the presence of variations of each block dimension. Compared with the Monte Carlo simulation results, the average errors of mean and range values computed by the proposed method are -0.78% & -12.96% respectively for area, -2.43% & -13.23% respectively for wirelength and up to 1000X speed up by testing on five MCNC benchmarks. Our solution to this problem is also interesting to related problems such as warehouse floorplanning. © 2010 IEEE.
Source Title: IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS
ISBN: 9781424474561
DOI: 10.1109/APCCAS.2010.5775008
Appears in Collections:Staff Publications

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