Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/68934
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dc.titleA new surface rounding technique for deep submicron CMOS transistor
dc.contributor.authorTat, C.Y.
dc.contributor.authorGoh, W.L.
dc.contributor.authorShenp, A.D.
dc.contributor.authorMeng, T.K.
dc.contributor.authorSamudra, G.S.
dc.contributor.authorHung, C.L.
dc.date.accessioned2014-06-19T02:54:56Z
dc.date.available2014-06-19T02:54:56Z
dc.date.issued2004
dc.identifier.citationTat, C.Y.,Goh, W.L.,Shenp, A.D.,Meng, T.K.,Samudra, G.S.,Hung, C.L. (2004). A new surface rounding technique for deep submicron CMOS transistor. 10th International Symposium on Integrated Circuits, Devices and Systems, ISIC-2004: Integrated Systems on Silicon - Proceedings : 235-237. ScholarBank@NUS Repository.
dc.identifier.isbn9810517874
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/68934
dc.description.abstractThe effect of oxidation temperature on corner founding has been studied. As the temperature increases, the curvature of corners becomes larger. This effect improves the subthreshold behaviour and eliminates the "early turn on" effect. However, the bottom edges form a sharp convex curve which will lead to poor reliability behaviour. Hence, a new surface patterning technique using a novel etching process has been developed and is demonstrated in this paper to be able to achieve a rounded silicon channel. Unlike the thermal oxidation where corner rounding only takes place at the edges, this proposed method uses a two-stage etch process to round the entire silicon surface without compromising the bottom edges.
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.sourcetitle10th International Symposium on Integrated Circuits, Devices and Systems, ISIC-2004: Integrated Systems on Silicon - Proceedings
dc.description.page235-237
dc.identifier.isiutNOT_IN_WOS
Appears in Collections:Staff Publications

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