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|Title:||A 0.7-V 100-μW audio delta-sigma modulator with 92-dB DR in 0.13-μm CMOS||Authors:||Yang, Z.
|Issue Date:||2011||Citation:||Yang, Z.,Yao, L.,Lian, Y. (2011). A 0.7-V 100-μW audio delta-sigma modulator with 92-dB DR in 0.13-μm CMOS. Proceedings - IEEE International Symposium on Circuits and Systems : 2011-2014. ScholarBank@NUS Repository. https://doi.org/10.1109/ISCAS.2011.5937990||Abstract:||A low-voltage fourth-order audio modulator is designed with a single-loop single-bit feedforward structure. A 2-tap FIR filter is inserted in the feedback loop to effectively attenuate the high frequency quantization noise, resulting 22% reduction in the maximum integration step of the first integrator and relaxing the slew rate requirement for the OTA to 9.5 V/sec (diff). The summation of feedforward paths is embedded in a multi-input quantizer to minimize power and area. Implemented in a 0.13-m CMOS technology and clocked at 4 MHz, the modulator achieves 87.0 dB SNDR and 91.8 dB DR for a 20-kHz signal bandwidth while consuming 99.7 W from a 0.7-V supply. © 2011 IEEE.||Source Title:||Proceedings - IEEE International Symposium on Circuits and Systems||URI:||http://scholarbank.nus.edu.sg/handle/10635/68693||ISBN:||9781424494736||ISSN:||02714310||DOI:||10.1109/ISCAS.2011.5937990|
|Appears in Collections:||Staff Publications|
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