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Please use this identifier to cite or link to this item: https://doi.org/10.1109/ASSCC.2008.4708827
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dc.title2ghz cmos noise cancellation vco
dc.contributor.authorBansal, A.
dc.contributor.authorHeng, C.H.
dc.date.accessioned2014-06-19T02:51:55Z
dc.date.available2014-06-19T02:51:55Z
dc.date.issued2008
dc.identifier.citationBansal, A.,Heng, C.H. (2008). 2ghz cmos noise cancellation vco. Proceedings of 2008 IEEE Asian Solid-State Circuits Conference, A-SSCC 2008 : 461-464. ScholarBank@NUS Repository. <a href="https://doi.org/10.1109/ASSCC.2008.4708827" target="_blank">https://doi.org/10.1109/ASSCC.2008.4708827</a>
dc.identifier.isbn9781424426058
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/68672
dc.description.abstractA 2GHz CMOS VCO, employing noise cancellation to eliminate flicker noise up-conversion, has been fabricated in 0.35um CMOS. An overall phase noise reduction of 10dB has been measured with the proposed technique, and phase noise of -121.6dBc/Hz@500kHz offset has been achieved. The VCO core consumes 2.8mA under 2.4V supply and occupies an area of 0.7mmx0.8mm. The proposed VCO measured FOM of -186 dBc/Hz.©2008 IEEE.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/ASSCC.2008.4708827
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/ASSCC.2008.4708827
dc.description.sourcetitleProceedings of 2008 IEEE Asian Solid-State Circuits Conference, A-SSCC 2008
dc.description.page461-464
dc.identifier.isiutNOT_IN_WOS
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