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|Title:||Self-timed system design technique||Authors:||Tan, Y.K.
|Issue Date:||1-Mar-1990||Citation:||Tan, Y.K.,Lim, Y.C. (1990-03-01). Self-timed system design technique. Electronics Letters 26 (5) : 284-286. ScholarBank@NUS Repository.||Abstract:||A new technique for the design of self-timed systems using a modified PCVSL (Precharged Cascode Voltage Switch Logic) circuit and a new handshaking protocol is presented. Our technique allows different data to be stored and computed in consecutive PCVSL pipeline stages simultaneously, resulting in a significant saving in silicon area and speed-up in fall-through delay.||Source Title:||Electronics Letters||URI:||http://scholarbank.nus.edu.sg/handle/10635/62747||ISSN:||00135194|
|Appears in Collections:||Staff Publications|
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