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|Title:||Relaxation of trapped charge at silicon grain boundary states||Authors:||Ling, C.H.
|Issue Date:||Mar-1987||Citation:||Ling, C.H.,Kwok, C.Y.,Woo, P.K. (1987-03). Relaxation of trapped charge at silicon grain boundary states. Solid State Electronics 30 (3) : 247-252. ScholarBank@NUS Repository.||Abstract:||Numerical computation of barrier potential and occupancies of donor and acceptor traps at silicon grain boundaries (GB) has been carried out. This analysis is based on a single-energy trap level and simple capture and emission processes. Two cases of GB states are examined: majority carrier traps, in which a single occupancy is assumed; both majority and minority carrier traps, in which two independent occupancies are assumed. Results show that, in the case of majority-carrier traps, initial charge relaxation after excitation of the GB states, is via emission of majority carriers. The relaxation time is found to be highly temperature dependent. In the presence of both donor and acceptor traps, the initial GB space charge can be shown to go into inversion, depletion or accumulation. Charge relaxation is through participation of both emission and capture of carriers. The theory also predicts the existence, especially at low temperatures, of a highly stable yet non-thermal equilibrium charge state. © 1987.||Source Title:||Solid State Electronics||URI:||http://scholarbank.nus.edu.sg/handle/10635/62703||ISSN:||00381101|
|Appears in Collections:||Staff Publications|
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