Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/62528
DC FieldValue
dc.titleOn the calculation of spreading resistance correction factors
dc.contributor.authorChoo, S.C.
dc.contributor.authorLeong, M.S.
dc.contributor.authorKuan, K.L.
dc.date.accessioned2014-06-17T06:52:03Z
dc.date.available2014-06-17T06:52:03Z
dc.date.issued1976-07
dc.identifier.citationChoo, S.C.,Leong, M.S.,Kuan, K.L. (1976-07). On the calculation of spreading resistance correction factors. Solid State Electronics 19 (7) : 561-565. ScholarBank@NUS Repository.
dc.identifier.issn00381101
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/62528
dc.description.abstractIt is shown that the calculations of spreading resistance correction factors for graded structures can be readily carried out by using a simple recurrence formula for the integration factor that occurs in Schumann and Gardner's multilayer theory. The number of layers that can be used in the practical application of this theory has hitherto been limited by the computer core size requirement, because the earlier method of calculating the integration factor requires the inversion of a 2N × 2N matrix for an N-layer approximation. The use of the recurrence formula effectively removes this constraint. In terms of computation time, the recurrence-formula method is also very efficient. The economy thus achieved both in computation time and in core size requirement makes it possible now to make spreading resistance correction a routine matter, without having to resort to such measures as Hu's interpolation and space partitioning scheme. © 1976.
dc.sourceScopus
dc.typeArticle
dc.contributor.departmentELECTRICAL ENGINEERING
dc.description.sourcetitleSolid State Electronics
dc.description.volume19
dc.description.issue7
dc.description.page561-565
dc.description.codenSSELA
dc.identifier.isiutNOT_IN_WOS
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