Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/62510
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dc.titleObservation of MOSFET degradation due to electrical stressing through gate-to-source and gate-to-drain capacitance measurement
dc.contributor.authorYeow, Y.T.
dc.contributor.authorLing, C.H.
dc.contributor.authorAh, L.K.
dc.date.accessioned2014-06-17T06:51:51Z
dc.date.available2014-06-17T06:51:51Z
dc.date.issued1991-07
dc.identifier.citationYeow, Y.T.,Ling, C.H.,Ah, L.K. (1991-07). Observation of MOSFET degradation due to electrical stressing through gate-to-source and gate-to-drain capacitance measurement. Electron device letters 12 (7) : 366-368. ScholarBank@NUS Repository.
dc.identifier.issn01938576
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/62510
dc.description.abstractThe authors present observations of changes in the gate capacitances of a MOSFET as a result of hot-carrier stressing and propose capacitance measurement as a method for evaluation of trapped charge. The effect of hot-carrier stressing on 2-μm effective channel length n-channel MOSFETs was monitored by measuring the gate-to-source capacitance and the gate-to drain capacitance. It was found that after electrically stressing a junction of the transistor, capacitances associated with the stressed junction were reduced, whereas the capacitances of the unstressed junction were found to have increased. The observation is explained in terms of the change in channel potential near the stressed junction due to negative trapped charge.
dc.sourceScopus
dc.typeArticle
dc.contributor.departmentELECTRICAL ENGINEERING
dc.description.sourcetitleElectron device letters
dc.description.volume12
dc.description.issue7
dc.description.page366-368
dc.description.codenEDLED
dc.identifier.isiutNOT_IN_WOS
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