Please use this identifier to cite or link to this item: https://doi.org/10.1109/31.81865
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dc.titleDecomposition of binary integers into signed power-of-two terms
dc.contributor.authorLim, Yong Ching
dc.contributor.authorEvans, Joseph B.
dc.contributor.authorLiu, Bede
dc.date.accessioned2014-06-17T06:46:16Z
dc.date.available2014-06-17T06:46:16Z
dc.date.issued1991-06
dc.identifier.citationLim, Yong Ching, Evans, Joseph B., Liu, Bede (1991-06). Decomposition of binary integers into signed power-of-two terms. IEEE transactions on circuits and systems 38 (6) : 667-672. ScholarBank@NUS Repository. https://doi.org/10.1109/31.81865
dc.identifier.issn00984094
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/61994
dc.description.abstractPrevious work has shown that approximation of digital filter coefficients using sums of signed power-of-two terms yields significant area/speed advantages in custom implementations, at the expense of a slight frequency response deterioration. The completeness, uniqueness, and resolving power of signed powers-of-two representations are studied, and circuits for extracting a prescribed number of signed power-of-two terms whose sum is the closest approximation to a given integer are presented. Examples of implementation of these circuits in a CMOS process are given.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/31.81865
dc.sourceScopus
dc.typeArticle
dc.contributor.departmentELECTRICAL ENGINEERING
dc.description.doi10.1109/31.81865
dc.description.sourcetitleIEEE transactions on circuits and systems
dc.description.volume38
dc.description.issue6
dc.description.page667-672
dc.description.codenICSYB
dc.identifier.isiutA1991FM57100014
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