Please use this identifier to cite or link to this item:
https://doi.org/10.1049/el:20072620
| Title: | SPICE compatible modelling of on-chip coupled interconnects | Authors: | Kumar, R. Kang, K. Rustagi, S.C. Mouthaan, K. Wong, T.K.S. |
Issue Date: | 2007 | Citation: | Kumar, R., Kang, K., Rustagi, S.C., Mouthaan, K., Wong, T.K.S. (2007). SPICE compatible modelling of on-chip coupled interconnects. Electronics Letters 43 (24) : 1336-1338. ScholarBank@NUS Repository. https://doi.org/10.1049/el:20072620 | Abstract: | On-chip coupled interconnect lines are modelled using measured S-parameters. The physical consistency between single and coupled line model parameters are maintained in the proposed methodology. The SPICE compatible model is validated in both the frequency and the time domain using copper and ultra low-κ coupled interconnects. | Source Title: | Electronics Letters | URI: | http://scholarbank.nus.edu.sg/handle/10635/57474 | ISSN: | 00135194 | DOI: | 10.1049/el:20072620 |
| Appears in Collections: | Staff Publications |
Show full item record
Files in This Item:
There are no files associated with this item.
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.