Please use this identifier to cite or link to this item: https://doi.org/10.1143/JJAP.47.2589
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dc.titleNovel extended-Pi shaped silicon - germanium source/drain stressors for strain and performance enhancement in p-channel tri-gate fin-type field-effect transistor
dc.contributor.authorTan, K.-M.
dc.contributor.authorLiow, T.-Y.
dc.contributor.authorLee, R.T.P.
dc.contributor.authorZhu, M.
dc.contributor.authorHoe, K.-M.
dc.contributor.authorTung, C.-H.
dc.contributor.authorBalasubramanian, N.
dc.contributor.authorSamudra, G.S.
dc.contributor.authorYeo, Y.-C.
dc.date.accessioned2014-06-17T02:59:13Z
dc.date.available2014-06-17T02:59:13Z
dc.date.issued2008-04-25
dc.identifier.citationTan, K.-M., Liow, T.-Y., Lee, R.T.P., Zhu, M., Hoe, K.-M., Tung, C.-H., Balasubramanian, N., Samudra, G.S., Yeo, Y.-C. (2008-04-25). Novel extended-Pi shaped silicon - germanium source/drain stressors for strain and performance enhancement in p-channel tri-gate fin-type field-effect transistor. Japanese Journal of Applied Physics 47 (4 PART 2) : 2589-2592. ScholarBank@NUS Repository. https://doi.org/10.1143/JJAP.47.2589
dc.identifier.issn00214922
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/56837
dc.description.abstractStrained p-channel tri-gate fin-type field-effect transistor (FinFET) with extended-Pi (e∏) shaped SiGe source/drain (S/D) is demonstrated with enhanced drive current performance of 33% at a fixed drain induced barrier lowering (DIBL) over FinFET with ∏-SiGe S/D. The e∏ S/D stressor structure can be easily formed by simply using a longer HF cleaning time prior to the growth of SiGe in the S/D regions. The longer HF cleaning step created a recess into the buried oxide which allows SiGe to be grown below the base of the Si fin at the S/D regions, providing additional strain to the channel. Enhancement of device performance was also found to increase with the decrease of fin width and this benefit aggressively scaled tri-gate FinFET for advance technology node. © 2008 The Japan Society of Applied Physics.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1143/JJAP.47.2589
dc.sourceScopus
dc.subjectExtended-Pi
dc.subjectFinFET
dc.subjectSiGe
dc.subjectSource/drain
dc.subjectStrained
dc.subjectTri-gate
dc.typeArticle
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1143/JJAP.47.2589
dc.description.sourcetitleJapanese Journal of Applied Physics
dc.description.volume47
dc.description.issue4 PART 2
dc.description.page2589-2592
dc.description.codenJAPND
dc.identifier.isiut000255449100054
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