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|Title:||CADSE: Communication aware design space exploration for efficient run-time MPSoC management||Authors:||Singh, A.K.
|Keywords:||design space exploration
synchronous dataflow graphs
|Issue Date:||2013||Citation:||Singh, A.K., Kumar, A., Wu, J., Srikanthan, T. (2013). CADSE: Communication aware design space exploration for efficient run-time MPSoC management. Frontiers of Computer Science 7 (3) : 416-430. ScholarBank@NUS Repository. https://doi.org/10.1007/s11704-013-2196-1||Abstract:||Real-time multi-media applications are increasingly mapped on modern embedded systems based on multiprocessor systems-on-chip (MPSoC). Tasks of the applications need to be mapped on the MPSoC resources efficiently in order to satisfy their performance constraints. Exploring all the possible mappings, i.e., tasks to resources combinations exhaustively may take days or weeks. Additionally, the exploration is performed at design-time, which cannot handle dynamism in applications and resources' status. A runtime mapping technique can cater for the dynamism but cannot guarantee for strict timing deadlines due to large computations involved at run-time. Thus, an approach performing feasible compute intensive exploration at design-time and using the explored results at run-time is required. This paper presents a solution in the same direction. Communicationaware design space exploration (CADSE) techniques have been proposed to explore different mapping options to be selected at run-time subject to desired performance and available MPSoC resources. Experiments show that the proposed techniques for exploration are faster over an exhaustive exploration and provides almost the same quality of results. © 2013 Higher Education Press and Springer-Verlag Berlin Heidelberg.||Source Title:||Frontiers of Computer Science||URI:||http://scholarbank.nus.edu.sg/handle/10635/55245||ISSN:||20952228||DOI:||10.1007/s11704-013-2196-1|
|Appears in Collections:||Staff Publications|
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