Please use this identifier to cite or link to this item:
https://scholarbank.nus.edu.sg/handle/10635/43246
Title: | Effect of event orderings on memory requirement in parallel simulation | Authors: | Teo, Y.M. Onggo, B.S.S. Tay, S.C. |
Issue Date: | 2001 | Citation: | Teo, Y.M.,Onggo, B.S.S.,Tay, S.C. (2001). Effect of event orderings on memory requirement in parallel simulation. IEEE International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems - Proceedings : 41-48. ScholarBank@NUS Repository. | Abstract: | A new formal approach based on partial order set (poset) theory is proposed to analyze the space requirement of discrete-event parallel simulation. We divide the memory required by a simulation problem into memory to model the states of the real-world system, memory to maintain a list of future event occurrences, and memory required to implement the event synchronization protocol. We establish the relationship between poset theory and event orderings in simulation. Based on our framework, we analyze the space requirement using an open and a closed system as examples. Our analysis shows that apart from problem size and traffic intensity that affects the memory requirement, event ordering is an important factor that can be analyzed before implementation. In an open system, a weaker event ordered simulation requires more memory than strong ordering. However, the memory requirement is constant and independent of event ordering in closed systems. | Source Title: | IEEE International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems - Proceedings | URI: | http://scholarbank.nus.edu.sg/handle/10635/43246 |
Appears in Collections: | Staff Publications |
Show full item record
Files in This Item:
There are no files associated with this item.
Google ScholarTM
Check
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.