Please use this identifier to cite or link to this item: https://doi.org/10.1109/VLSID.2006.95
DC FieldValue
dc.titleHandling constraints in multi-objective GA for embedded system design
dc.contributor.authorChakraborty, B.
dc.contributor.authorChen, T.
dc.contributor.authorMitra, T.
dc.contributor.authorRoychoudhury, A.
dc.date.accessioned2013-07-23T09:27:21Z
dc.date.available2013-07-23T09:27:21Z
dc.date.issued2006
dc.identifier.citationChakraborty, B.,Chen, T.,Mitra, T.,Roychoudhury, A. (2006). Handling constraints in multi-objective GA for embedded system design. Proceedings of the IEEE International Conference on VLSI Design 2006 : 305-310. ScholarBank@NUS Repository. <a href="https://doi.org/10.1109/VLSID.2006.95" target="_blank">https://doi.org/10.1109/VLSID.2006.95</a>
dc.identifier.isbn0769525024
dc.identifier.issn10639667
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/43187
dc.description.abstractDesign space exploration is central to embedded system design. Typically this is a multi-objective search problem, where performance, power, area etc. are the different optimization criteria, to find the Pareto-optimal points. Multi-objective Genetic Algorithms (GA) have been found to be a natural fit for such searches and have been used widely. However, for certain design spaces, a large part of the space being explored by GA may violate certain design constraints. In this paper, we use a multi-objective GA algorithm based on "repair", where an infeasible design point encountered during the search is repaired to a feasible design point. Our primary novelty is to use a multi-objective version of search algorithms, like branch and bound, as the repair strategy to optimize the objectives. We also precompute a layout of the genes such that infeasible design points are less likely to be encountered during the search. We have successfully employed our hybrid search strategy to design application-specific instruction-set extensions that maximize performance and minimize area. © 2006 IEEE.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/VLSID.2006.95
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentCOMPUTER SCIENCE
dc.contributor.departmentSTATISTICS & APPLIED PROBABILITY
dc.description.doi10.1109/VLSID.2006.95
dc.description.sourcetitleProceedings of the IEEE International Conference on VLSI Design
dc.description.volume2006
dc.description.page305-310
dc.description.codenPIVDE
dc.identifier.isiutNOT_IN_WOS
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