Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/37915
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dc.titleDomain Wall Pinning in Magnetic Logic Devices
dc.contributor.authorRUAN XIAOFAN
dc.date.accessioned2013-05-31T18:03:04Z
dc.date.available2013-05-31T18:03:04Z
dc.date.issued2013-01-16
dc.identifier.citationRUAN XIAOFAN (2013-01-16). Domain Wall Pinning in Magnetic Logic Devices. ScholarBank@NUS Repository.
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/37915
dc.description.abstractMagnetic logic devices have attracted significant amount of attention in recent years, thanks to their low power consumption and non-volatility. However, one important issue needs to be resolved before these devices can become reality, namely the pinning of magnetic domain walls. In this project, we investigate a method for pinning domain walls by locally modifying the saturation magnetization (Ms). Micromagnetic simulations indicated that the pinning strength of the proposed domain wall traps varies linearly with the change in Ms, thus making the pinning strength easily controllable. Furthermore, the study showed that under certain conditions, the pinning strengths of these traps are not affected by variations in trap lengths, rendering the traps tolerant to fabrication variations. Subsequent experiments successfully showed that local variations of Ms, induced by Focused Ion Beam (FIB) irradiation, can indeed achieve domain wall pinning. However, more detailed analysis was hindered by a large measurement noise.
dc.language.isoen
dc.subjectMagnetic Logic, Domain Wall Pinning, Racetrack Memory, Ferromagnetic Nanowire
dc.typeThesis
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.contributor.supervisorWU YIHONG
dc.description.degreeMaster's
dc.description.degreeconferredMASTER OF ENGINEERING
dc.identifier.isiutNOT_IN_WOS
Appears in Collections:Master's Theses (Open)

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