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https://scholarbank.nus.edu.sg/handle/10635/32802
Title: | Method for fabricating semiconductor devices with reduced junction diffusion | Authors: | COLOMBEAU, BENJAMIN YEONG, SAI HOOI BENISTANT, FRANCIS INDAJANG, BANGUN CHAN, LAP |
Issue Date: | 8-Nov-2011 | Citation: | COLOMBEAU, BENJAMIN,YEONG, SAI HOOI,BENISTANT, FRANCIS,INDAJANG, BANGUN,CHAN, LAP (2011-11-08). Method for fabricating semiconductor devices with reduced junction diffusion. ScholarBank@NUS Repository. | Abstract: | A transistor which includes halo regions disposed in a substrate adjacent to opposing sides of the gate. The halo regions have upper and lower regions. The upper region is a crystalline region with excess vacancies and the lower region is an amorphous region. Source/drain diffusion regions are disposed in the halo regions. The source/drain diffusion regions overlap the upper and lower halo regions. This architecture offers the minimal extension resistance as well as minimum lateral diffusion for better CMOS device scaling. | URI: | http://scholarbank.nus.edu.sg/handle/10635/32802 |
Appears in Collections: | Staff Publications |
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