Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/32554
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dc.titleIC packaging lead frame for reducing chip stress and deformation
dc.contributor.authorLIM, THIAM BENG
dc.contributor.authorBHANDARKAR, SARVOTHAM M.
dc.date.accessioned2012-05-02T02:26:57Z
dc.date.available2012-05-02T02:26:57Z
dc.date.issued1998-06-30
dc.identifier.citationLIM, THIAM BENG,BHANDARKAR, SARVOTHAM M. (1998-06-30). IC packaging lead frame for reducing chip stress and deformation. ScholarBank@NUS Repository.
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/32554
dc.description.abstractThe present invention relates to a lead frame design for IC packaging to reduce chip stress and deformation and to improve mold filling. The die-pad is split into several sections which are jointed together by flexible expansion joints. The split die-pad allows relative motion between the pad and the chip during die attach cure. It also breaks down the total die pad area (and length) that is rigidly attached to the chip into smaller sections. These two factors reduce the magnitude of coefficient-of-thermal expansion (CTE) mismatch and out of plane deformation of the assembly, resulting in lower chip stress and deformation and improved package moldability.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/http://analytics.patsnap.com/patent_view/view?pn=US5773878
dc.sourcePatSnap
dc.typePatent
dc.contributor.departmentINSTITUTE OF MICROELECTRONICS
dc.identifier.isiutNOT_IN_WOS
dc.description.patentnoUS5773878
dc.description.patenttypeGranted Patent
dc.contributor.patentassigneeINSTITUTE OF MICROELECTRONICS NATIONAL UNIVERSITY OF SINGAPORE
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