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Title: Application of High-k Dielectric to Non-Volatile Memory Devices
Authors: ZHANG LU
Keywords: high-k, dielectric, memory
Issue Date: 20-Jan-2010
Citation: ZHANG LU (2010-01-20). Application of High-k Dielectric to Non-Volatile Memory Devices. ScholarBank@NUS Repository.
Abstract: Rapid scaling of complementary-metal-oxide (CMOS) devices has led to performance challenges posed by the properties of conventional materials. To meet this challenge, new high-? materials have been widely studied for the applications ranging from memory devices to radio frequency (RF)/ mixed-signal (MS) technology for wireless communication. In this work, we explored the scaling limit as well as possible materials for the interpoly dielectric (IPD) layer in future floating gate flash memory devices. A systematic study of leakage current through the IPD layer was conducted using the MEDICI simulator. Various high-? dielectrics were studied for their feasibility of being used as IPD. Simulation result shows that while conventional high-? materials like Al2O3 and HfO2 can no longer meet the ITRS scaling requirement, new high-? dielectrics like La doped Al2O3 and HfO2 show the potential to be used in the 32 nm technology node. Experimental result shows that multi-layer high-? dielectric structures using Al2O3 and HfO2 based dielectric stack exhibit much improved dielectric thermal stability than that of single layer dielectric. Moreover, simulation suggests that, contrary to the conventional high-low-high barrier structure like oxide-nitride-oxide (ONO) IPD, a low-high-low barrier structure like HfO2?Al2O3?HfO2 exhibits lower leakage current at high electrical fields due to the longer effective tunneling distance. The advantage of low-high-low barrier structure over high-low-high barrier structure was then confirmed by experiments. The presence of an interfacial layer between high-? and polysilicon floating gate (FG) was studied with simulation and experiment results reveal that a significant portion of the voltage will drop across the low-? interfacial layer, decreasing the effective tunneling distance, and leading to an increased leakage current several orders higher. It is suggested that the control of this interfacial layer plays an important role in reducing leakage current. By using a low-high-low barrier structure IPD together and suppressing the interfacial layer between high-k and polysilicon floating gate, the leakage current through IPD layer can be significantly reduced. Novel high-? MIM capacitors were also developed for radio frequency and analog/mixed-signal (RF and AMS) IC application. The feasibility of a La-doped HfO2 based MIM capacitor was investigated using the dielectric deposited by an atomic layer deposition (ALD) method. It is found that for a single layer HfLaO thicker than 20 nm, the crystallization temperature can be as low as 420oC. A high dielectric constant of 38 is achieved upon film crystallization, however with a trade off degraded voltage linearity. By insertion of a LaAlO3 layer, grain boundary channels extending from the top to the bottom electrode are interrupted, and good interfacial quality near the bottom electrode can be achieved. Consequently, HfLaO film crystallization is effectively suppressed and an improved voltage linearity results. Both single layer 8% La doped HfO2 capacitors and HfLaO-LaAlO3-HfLaO multilayer stacked MIM capacitors exhibit excellent electrical characteristics such as low leakage current, quadratic linearity, high breakdown field and good device reliability, which make them promising candidates for RF circuit applications.
Appears in Collections:Ph.D Theses (Open)

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