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Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/225258
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dc.titleDESIGN OF LOW POWER, HARDWARE-AWARE ANALOG MEMORY-BASED ACCELERATORS FOR DEEP LEARNING
dc.contributor.authorVELURI HASITA
dc.date.accessioned2022-05-11T18:00:21Z
dc.date.available2022-05-11T18:00:21Z
dc.date.issued2022-01-03
dc.identifier.citationVELURI HASITA (2022-01-03). DESIGN OF LOW POWER, HARDWARE-AWARE ANALOG MEMORY-BASED ACCELERATORS FOR DEEP LEARNING. ScholarBank@NUS Repository.
dc.identifier.urihttps://scholarbank.nus.edu.sg/handle/10635/225258
dc.language.isoen
dc.subjectDTCO for IoT, memristors, hardware accelerators, analog memory accelerators, DFT using analog memories
dc.typeThesis
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.contributor.supervisorVoon Yew Thean
dc.description.degreePh.D
dc.description.degreeconferredDOCTOR OF PHILOSOPHY (FOE)
dc.identifier.orcid0000-0002-0549-8341
Appears in Collections:Ph.D Theses (Closed)

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