Please use this identifier to cite or link to this item: https://doi.org/10.1109/LSSC.2020.3024838
Title: Broad-Purpose In-Memory Computing for Signal Monitoring and Machine Learning Workloads
Authors: SAURABH JAIN 
LIN LONGYANG 
ALIOTO,MASSIMO BRUNO 
Issue Date: 1-Sep-2020
Publisher: IEEE
Citation: SAURABH JAIN, LIN LONGYANG, ALIOTO,MASSIMO BRUNO (2020-09-01). Broad-Purpose In-Memory Computing for Signal Monitoring and Machine Learning Workloads. IEEE Solid-State Circuits Letters 3 : 394-397. ScholarBank@NUS Repository. https://doi.org/10.1109/LSSC.2020.3024838
Rights: CC0 1.0 Universal
Abstract: In this paper, a broad-purpose compute-in-memory solution (±CIM) able to handle arbitrary sign in both inputs/features and weights/coefficients is introduced. The ability to operate on arbitrary sign and under variable precision on both operands enables a wide range of applications, ranging from conventional neural networks to digital signal processing and monitoring. The ±CIM pipelined architecture, the reconfigurable row encoder and the adoption of a commercial 2-port bitcell allow uninterrupted memory availability for conventional read/write, even when performing in-memory computations. A 40nm testchip shows the ability of the ±CIM architecture to perform both neural network computations and classical signal processing. At 6-bit precision, the measured worst-case mismatch (noise) is 0.38 (0.62) LSB. The achieved accuracy when executing a LeNet-5 neural net workload is 98.3%, which is within 1.3% of state-of-the-art software implementations. As example of signal processing workload, 91.7% accuracy is achieved in voice activity detection, which is within 2.8% of a software implementation. Overall, the energy efficiency (throughput) of 41 TOPS/W (122 GOPS) is achieved at 38% area overhead, over a conventional SRAM with the same 4-KB capacity.
Source Title: IEEE Solid-State Circuits Letters
URI: https://scholarbank.nus.edu.sg/handle/10635/189165
ISSN: 2573-9603
DOI: 10.1109/LSSC.2020.3024838
Rights: CC0 1.0 Universal
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