DESIGN OF ANALOG VLSI CIRCUIT : A DIFFERENTIAL-IN DIFFERENTIAL-OUT HIGH SPEED, HIGH GAIN OP AMP

Abstract

In this project, a CMOS Differential-In Differential-Out (DIDO) Op Amp was designed for high speed and high gain performance. The Op Amp designed has a DC gain of 94 DB. It has a unity-gain frequency of 180 Mhz when driving a capacitive load of 5 pF. The undesired common mode gain in the DIDO op amp is very high. Hence commonmode feedback was used to reduce the output common-mode voltage. HSPICE was used for circuit simulations in this project. The transistor model used is the HSPICE Level 28 model. The transistor parameters used were for a 0.8 um, nwell, CMOS process technology. This was provided by Alpha-Service of the Institute of MicroElectronics (IME).