HOT-CARRIER CHARACTERIZATION OF SUBMICROMETER MOS TRANSISTORS : SUBTHRESHOLD DEGRADATION AND CHANNEL-WIDTH EFFECT

Abstract

With the continual scaling of MOS transistors to deep-submicrometer dimensions, the hot-carrier-induced degradation is one of the primary mechanisms affecting the reliability of integrated circuits. In this project, the hot-carrier-induced degradation in the subthreshold characteristics of LDD PMOS transistors is characterized. In addition, the hot-carrier effects on different channel widths fully-recessed LOCOS NMOS transistors are investigated. The hot-carrier-induced degradation in the subthreshold characteristics of buried-channel submicron LDD p-MOSFET is studied. LDD p-MOSFETs exhibit higher degradation in the subthreshold characteristics as channel lengths are scaled to smaller dimensions. Trapped electrons in the oxide due to hot-carrier stress induce positive channel carriers in the pinch-off region resulting in an effective channel length reduction. A physical subthreshold current model is applied to the fresh and hot-carrier stressed submicrometer channel length devices. From the empirical relation proposed to characterize the degradation, one can predict the minimum allowable channel length (for a certain percentage of degradation and lifetime) that is applicable for a specific technology. The subthreshold current degradation is modelled using an analytical expression. It is demonstrated that the degradation of the p-MOSFET subthreshold current will impose a limit on device reliability for deep-submicron technology and low-power applications. Thus, the optimization of the subthreshold characteristics should be given high priority in the design of deep-submicrometer p-MOSFETs. The hot-carrier reliability on wide and narrow channel subquarter micron technology n-MOSFET devices with R-LOCOS (i.e .. fully-recessed LOCOS) structures are investigated. The R-LOCOS process steps and the impact of very narrow channel n-MOSFETs with LOCOS structures on the hot-carrier reliability are firstly reviewed. The hot-carrier reliability on the subquarter micron technology n-MOSFETs with R-LOCOS structures are characterized. A larger degradation is observed for the wide channel devices as compared to the narrow channel devices. Charge-pumping (CP) measurements were performed to monitor the damage created during the hot-carrier stress. Two-dimensional process simulation on the R-LOCOS structure and three-dimensional device simulation on the electrical characteristics of the device are carried out to explain the experimental observations. The higher drain current degradation observed for wide channel devices is attributed to greater interface state generation due possibly to a more favorable vertical field for hole injection. However, further work needs to be done to understand better the mechanism responsible for the channel-width dependence of the hot-carrier degradation.