Please use this identifier to cite or link to this item:
https://scholarbank.nus.edu.sg/handle/10635/17390
DC Field | Value | |
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dc.title | A full-custom digital-signal-processing unit for real-time cortical blood flow monitoring | |
dc.contributor.author | HONG ZHIQIAN | |
dc.date.accessioned | 2010-06-09T18:00:14Z | |
dc.date.available | 2010-06-09T18:00:14Z | |
dc.date.issued | 2009-12-24 | |
dc.identifier.citation | HONG ZHIQIAN (2009-12-24). A full-custom digital-signal-processing unit for real-time cortical blood flow monitoring. ScholarBank@NUS Repository. | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/17390 | |
dc.description.abstract | This thesis presents a full custom digital-signal-processing unit for real-time cortical blood flow monitoring. An evaluation of suitable algorithms using Laser Speckle Imaging statistical methods is presented from a theoretical perspective for practical implementations. All existing methods are found to be mathematically describing the same coefficient of variation but with different input samples and sample sizes. The simplest algorithm, Laser Speckle Contrast Analysis, is chosen to relax on the real-time imaging requirement. Unlike normal imaging applications which require high speed and accuracy, biomedical imaging specifications are often relaxed to the minimum to achieve a low- power application. Consequently, CMOS sensors are evaluated and compared on their architectures that will eventually lead to the design of a low-power on-chip digital signal processing unit. Numerous low-power digital techniques are discussed and applied on the design. These techniques include aggressive lowering of supply voltage close to or less than the sum of absolute device threshold, non pre-charged memory, clock-gating and pulse-latch clocking strategies. Performance is maintained through the use of bit-serial arithmetic units and these units include adder, multiplier, squarer, square-root and divider. This design is implemented in 0.35µm and a post-layout simulated power consumption of 887µW is achieved at a supply voltage of 1.2V while maintaining 30MHz at worst corner variation. This translates to approximately 1 million speckle contrast computations per second and a Figure of Merit of 962pW/fp. | |
dc.language.iso | en | |
dc.subject | System-on-chip, CMOS image sensor, digital signal processing, laser speckle imaging | |
dc.type | Thesis | |
dc.contributor.department | ELECTRICAL & COMPUTER ENGINEERING | |
dc.contributor.supervisor | LE MINH THINH | |
dc.description.degree | Master's | |
dc.description.degreeconferred | MASTER OF ENGINEERING | |
dc.identifier.isiut | NOT_IN_WOS | |
Appears in Collections: | Master's Theses (Open) |
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File | Description | Size | Format | Access Settings | Version | |
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HongZQ.pdf | 4.27 MB | Adobe PDF | OPEN | None | View/Download |
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