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|Title:||Timing analysis of concurrent programs running on shared cache multi-cores||Authors:||LI YAN||Keywords:||WCET, Abstract Interpretation, Shared Cache, Multi-Core, WCRT, Message Sequence Chart||Issue Date:||13-Jan-2010||Citation:||LI YAN (2010-01-13). Timing analysis of concurrent programs running on shared cache multi-cores. ScholarBank@NUS Repository.||Abstract:||Memory accesses form an important source of timing unpredictability. Timing analysis of real-time embedded software thus requires bounding the time for memory accesses. Multiprocessing, a popular approach for performance enhancement, opens up the opportunity for concurrent execution. However due to contention for any shared memory by different processing cores, memory access behavior becomes more unpredictable, and hence harder to analyze. In this thesis, we develop a timing analysis method for concurrent software running on multi-cores with a shared instruction cache. We do not handle data cache, shared memory synchronization and code sharing across tasks. The method progressively refines the lifetime estimates of tasks that execute concurrently on multiple cores, in order to estimate potential conflicts in the shared cache. Possible conflicts arising from overlapping task lifetimes are accounted for in the hit-miss classification of accesses to the shared cache, to provide safe execution time bounds. We show that our method produces tighter worst-case response time (WCRT) estimates than existing shared-cache analysis on a real-world embedded application.||URI:||http://scholarbank.nus.edu.sg/handle/10635/17367|
|Appears in Collections:||Master's Theses (Open)|
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