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https://scholarbank.nus.edu.sg/handle/10635/172366
DC Field | Value | |
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dc.title | SAR/ISAR DATA ACQUISTITION SYSTEM DESIGN, SIMULATION AND IMPLEMENTATION | |
dc.contributor.author | REN TAO DINO | |
dc.date.accessioned | 2020-08-11T10:13:16Z | |
dc.date.available | 2020-08-11T10:13:16Z | |
dc.date.issued | 1996 | |
dc.identifier.citation | REN TAO DINO (1996). SAR/ISAR DATA ACQUISTITION SYSTEM DESIGN, SIMULATION AND IMPLEMENTATION. ScholarBank@NUS Repository. | |
dc.identifier.uri | https://scholarbank.nus.edu.sg/handle/10635/172366 | |
dc.description.abstract | A data acquisition system for SAR (Synthetic aperture radar) and ISAR (Inverse Synthetic aperture radar) is designed and implemented, which carries out data capturing, data digitizing, data buffering and data preprocessing. The front-end interface is provided for a wide application. A new precision programmable timer, which use the DDS (direct digital synthesis) technology, for controlling the acquisition system and other units in the SAR system is designed, implemented, and successfully tested to provide increased flexibility, reliability and stability. After comparing the RJSC and CISC architecture, Intel i860 is chosen to be the main DSP processor in the system. A pre-processing algorithm is developed and implemented on the DSP board. The One-Line-Buffer memory scheme is introduced in the FIR presum filter instead of the corner turning method. The performance of the resulting system is excellent and demonstrates its advantage of flexibility in various situations. | |
dc.source | CCK BATCHLOAD 20200814 | |
dc.type | Thesis | |
dc.contributor.department | ELECTRICAL ENGINEERING | |
dc.contributor.supervisor | YEO TAT SOON | |
dc.contributor.supervisor | ZHANG CHENGBO | |
dc.description.degree | Master's | |
dc.description.degreeconferred | MASTER OF ENGINEERING | |
Appears in Collections: | Master's Theses (Restricted) |
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