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Title: | POWER FACTOR CORRECTION OF SWITCH MODE POWER SUPPLIES | Authors: | CHAM YEW THEAN | Issue Date: | 1996 | Citation: | CHAM YEW THEAN (1996). POWER FACTOR CORRECTION OF SWITCH MODE POWER SUPPLIES. ScholarBank@NUS Repository. | Abstract: | There are two parts to this thesis. In the first part of the thesis, a single stage PFC circuit which operates at a fixed frequency and provides input current shaping as well as tight output voltage regulation is presented. The circuit can be viewed as a combination of two topologies consisting of a boost converter at the front-end and a flyback converter at the back-end. The theoretical waveforms and four different modes of operation for the circuit are shown and discussed. The de characteristics which can be used in the design of the circuit have been established. Each successive operating mode is shown to be an improvement over the preceding one. All the four operating modes involve operating the boost converter at the front end in discontinuous conduction mode; a necessary criterion for automatic input current shaping to achieve high input power factor. The fourth mode of operation eliminates the shortfalls suffered by the previous three modes by combining manageable switch stresses with moderately high input power factor. In this mode, the flyback converter operates in discontinuous conduction mode during light load condition and in continuous conduction mode during moderate to heavy load conditions. The single stage PFC circuit with this mode of operation is a potential candidate for a viable low power single stage PFC application in terms of high input power factor, low component stress, simplicity in control implementation and low component count. The second part of this thesis involves investigating power factor correcting schemes for high power applications. A boost-bypass PFC (BBC) scheme is presented. This scheme (BBC) is a partial parallel power processing scheme and falls midway between the two stage solution, which involves two separate power processing stages, and the single stage schemes, which involve only one power processing stage. In this scheme, the input power is partially processed by the bypass unit, which consists of a rectifier-capacitor type input circuit, and the boost PFC unit. The desired benefits derived from implementing the BBC scheme include reduced stresses on the power components, higher conversion efficicency and higher switching frequency allowed (to reduce the size of magnetic components) compared to the conventional cascaded solution to the PFC problem. These benefits are subsequently verified by a viability study. The viability study shows that the BBC scheme does result in moderately high power factor of 0.95 while the power factor correction unit processes only 60% of the total input power. Various closed loop control schemes for controlling the input power processing between the boost PFC unit and the bypass unit in a boost-bypass circuit are subsequently investigated and presented. An innovative closed loop control for maintaining a stable balance between bypass power processing and boost PFC power processing has been successfully devised and implemented on an actual power module. The input power factor is maintained above 0.95 for an input voltage range from 85Vac to 132Vac. Moreover, the input current harmonics produced by the power module are also well below the IEC555-2 Class A harmonic limits. | URI: | https://scholarbank.nus.edu.sg/handle/10635/172329 |
Appears in Collections: | Master's Theses (Restricted) |
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