Board level drop testing of advanced IC packaging

Abstract

This project aims to investigate the drop impact responses of microelectronic packagings mounted on a printed circuit board (PCB). These responses include input and output acceleration levels, in-plane board strains, velocity and in-situ resistance measurement. The drop tests are performed in accordance with the JEDEC standards. The effects of varying strike surfaces, drop heights, tightness of mounting screws, screw fixations and PCB sizes are studied to simulate the likely conditions that a product can encounter during an accidental drop impact.Failure analysis by cross-sectioning is done on the samples to examine possible failure modes encountered during impact. The results are then compared with stress analysis obtained from computational simulation.