Please use this identifier to cite or link to this item:
|Title:||A high-frequency quad-modulus prescaler for fractional-N frequency synthesizer||Authors:||LAU WEE YEE WENDY||Keywords:||quad-modulus prescaler, current mode logic (CML), CMOS, high-frequency, fractional-N frequency synthesizer, phase-locked loop (PLL)||Issue Date:||4-Aug-2009||Citation:||LAU WEE YEE WENDY (2009-08-04). A high-frequency quad-modulus prescaler for fractional-N frequency synthesizer. ScholarBank@NUS Repository.||Abstract:||The design of a high-frequency fractional-N frequency synthesizer, which offers technological robustness, versatility, fast locking capability, low noise contribution, superior integration capacity and multi-modulus flexibility, for use in the 2450MHz band (and also support the 910MHz band) operation using a 0.35Âµm CMOS technology is demonstrated. The design focuses on the prescaler, which is one of the critical speed bottlenecks for phase-locked loop (PLL). A quad-modulus prescaler with programmable division ratios of 16/17/20/21 is implemented using differential current mode logic (CML) latches, OR-embedded CML latches and dynamic OR-gates to minimize dynamic power consumption, avoid glitches and jitter due to mismatch in input signalsâ phases whilst maintaining high-frequency and fast-switching capabilities. The prescaler is able to operate up to 3.87GHz with Iac=21.09mA, and 3.05GHz with Iac=18.09mA. The entire synthesizer design draws 21.34mA from a 3.3V supply, and occupies an area of approximately 0.699mm2.||URI:||http://scholarbank.nus.edu.sg/handle/10635/16823|
|Appears in Collections:||Master's Theses (Open)|
Show full item record
Files in This Item:
|LauWYW.pdf||2.76 MB||Adobe PDF|
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.