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https://scholarbank.nus.edu.sg/handle/10635/16804
DC Field | Value | |
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dc.title | Semiconductor nanowires for future nanoscale application: Synthesis, characterization and nanoelectronic devices | |
dc.contributor.author | YANG WEIFENG | |
dc.date.accessioned | 2010-04-15T18:35:03Z | |
dc.date.available | 2010-04-15T18:35:03Z | |
dc.date.issued | 2009-08-04 | |
dc.identifier.citation | YANG WEIFENG (2009-08-04). Semiconductor nanowires for future nanoscale application: Synthesis, characterization and nanoelectronic devices. ScholarBank@NUS Repository. | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/16804 | |
dc.description.abstract | As one of the most promising candidates of next generation nanoelectronics devices, semiconductor nanowires (NWs) have attracted much attention in the research world. Here, we report that single crystallized semiconductor nanowires, such as Silicon nanowires (SiNW), Silicon Germanium nanowires (Si1-xGex NWs), are successfully synthesized by using Vapor-Liquid-Solid (VLS) mechanism. The material morphology and compound properties are investigated. More experiment is carried out to integrate the grown semiconductor NWs with high-N: dielectric and metal Source and Drain (S/D). Hence, high performance Schottky Barrier (SB) Si or Si1-xGex nanowire based MOSFETs are demonstrated and studied. To improve the device performance, we try different high-k gate oxide and metal S/D. Both long channel (1um) and short channel (65nm) devices are successfully fabricated. The annealing effect to improve the schottky contact of the devices is discussed. Such devices have p-MOSFET performance due to high work function metal used for metal S/D. The effective barrier height which is modulated by the back gate control can be the main factor to dominate the device operation. From the device characteristic data measured in different temperatures, we extract the real schottky barrier height (SBH). | |
dc.language.iso | en | |
dc.subject | semiconductor nanowire, High k dielectric, MOSFET, Schottky barrier, nanoelectronics, Vapor-Liquid-Solid method | |
dc.type | Thesis | |
dc.contributor.department | ELECTRICAL & COMPUTER ENGINEERING | |
dc.contributor.supervisor | LEE SUNGJOO | |
dc.contributor.supervisor | CHO BYUNG-JIN | |
dc.description.degree | Ph.D | |
dc.description.degreeconferred | DOCTOR OF PHILOSOPHY | |
dc.identifier.isiut | NOT_IN_WOS | |
Appears in Collections: | Ph.D Theses (Open) |
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Thesis_Yang Weifeng_Full version .pdf | 7.86 MB | Adobe PDF | OPEN | None | View/Download |
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