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https://scholarbank.nus.edu.sg/handle/10635/16564
DC Field | Value | |
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dc.title | Design of adaptive and hybrid energy & QOS aware heterogeneous multiprocessor scheduling strategies for embedded systems | |
dc.contributor.author | SIVANESAN KAILASH PRABHU | |
dc.date.accessioned | 2010-04-08T11:06:34Z | |
dc.date.available | 2010-04-08T11:06:34Z | |
dc.date.issued | 2009-07-03 | |
dc.identifier.citation | SIVANESAN KAILASH PRABHU (2009-07-03). Design of adaptive and hybrid energy & QOS aware heterogeneous multiprocessor scheduling strategies for embedded systems. ScholarBank@NUS Repository. | |
dc.identifier.uri | https://scholarbank.nus.edu.sg/handle/10635/16564 | |
dc.description.abstract | A key challenge faced by Body Sensor Networks (BSN) is the efficientutilization of energy at the various processing nodes. Being portable andunobtrusive, the preferred choice of energy source for these nodes is thebattery. In this work we propose a static battery and QoS aware schedul-ing algorithm to schedule an application modeled as a Directed AcyclicGraph (DAG), with dependency and deadline constraints, on to the het-erogeneous processing elements that comprise the BSN. This work is thefrst in literature to address the battery-aware multi-processor schedulingproblem, which happens to be a traditional task, under the context ofeach processing node being powered by individual heterogeneous batteries.The proposed algorithm exploits rate-capacity effect and recovery effect tomaximize the charge drawn from a battery. The algorithm also strivesto achieve uniform wear-off of the batteries in the BSN. A novel batterymodel previously developed in literature is utilized to guide the schedulingprocess. The DC-DC converter is eliminated and the battery is interfaceddirectly to the processing element to minimize converter losses and achievebetter control over the battery discharge current. The developed algorithmis suitable for systems that do not support Dynamic Voltage Scaling (DVS)and where charge utilization can be maximized by profling the dischargecurrent drawn from the battery. An application tool is also developed aspart of this work to provide a graphical front-end to simulate and evaluateperformance of scheduling algorithms. | |
dc.language.iso | en | |
dc.subject | BSN, PVS, multiprocessor, scheduling, battery, power-aware | |
dc.type | Thesis | |
dc.contributor.department | ELECTRICAL & COMPUTER ENGINEERING | |
dc.contributor.supervisor | VEERAVALLI, BHARADWAJ | |
dc.description.degree | Master's | |
dc.description.degreeconferred | MASTER OF ENGINEERING | |
dc.identifier.isiut | NOT_IN_WOS | |
Appears in Collections: | Master's Theses (Open) |
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Sivanesan Kailash Prabhu.pdf | 1.29 MB | Adobe PDF | OPEN | None | View/Download |
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